An Efficient Active Diode Clamped Multilevel Inverter with Reduced Switching Stress

A multilevel inverter have become more popular over the year. multilevel inverter can eliminate the need for the step-up transformer and reduce the harmonics produced by the inverter. Although the multilevel inverter structure was initially introduced as a means of reducing the output waveform harmonic content, it was found that the dc bus voltage could be increased beyond the voltage rating of an individual power device by the use of a voltage clamping network consisting of diodes. By using voltage clamping techniques, the system KV rating can be extended beyond limits of an individual device. This work proposes three phase Diode Clamped Multilevel Inverter (DCMLI) to various modulating techniques. These pulses Width Modulation (PWM) techniques include phase Disposition (PD), phase opposition Disposition (POD).Simulation is performed using MATLAB – SIMULINK .It is observed that PODPWM method provide output with relatively low harmonics distortion at the inverter output. Simulation result has discussed. The MOSFET internal capacitance and body diodes are used for active clamping which eliminates the need for snubber.. Keywords— Diode clamped multilevel inverter, PWM , THD